Welcome to DVCon U.S. 2022!

SAN JOSE, CA, USA
FEBRUARY 28 – MARCH 3, 2022
In person at the DoubleTree Hotel San Jose, CA

Tutorial, Short Workshop, and Panel Proposal Deadline EXTENDED to September 24th!

The Design & Verification Conference & Exhibition is the premier conference on the application of languages, tools, methodologies and standards for the design and verification of electronic systems and integrated circuits. The focus of this highly technical conference is on the practical aspects of these technologies and their use in leading-edge projects to encourage attendees to adopt similar techniques to improve their own design and verification flows. We will return to a live, in-person conference for 2022.

Call for Extended Abstracts

Call for Panels

Call for Workshops

Call for Tutorials

Mark your Calendars

Important Deadlines

July 12, 2021

Submission Site Open

August 13, 2021

Abstract Submission Deadline

September 24, 2021

Proposal EXTENDED Deadline for Panel, Short Workshop, Tutorial Submissions

September 14, 2021

Preliminary Accept/Reject Notification

November 22, 2021

Speaker Confirmation Forms Due

Possible Submissions

Example Topics

VERIFICATION
& VALIDATION
  • Advanced methodologies and test-benches
  • Verification processes, regressions and resource management
  • Debug and analysis of complex designs
  • Multi-language design and verification
  • Hardware/Software co-design and co-verification of embedded systems
SAFETY-CRITICAL DESIGN & VERIFICATION
  • Verification and DO-254 compliance
  • Automotive ISO 26262 Design and Verification Challenges
  • Medical or Industrial Verification Challenges
  • Requirements-Driven Verification Methodologies
  • IP protection and security
DESIGN AND VERIFICATION REUSE & AUTOMATION
  • Bridging verification and validation across multiple engines
  • SoC and IP integration methods and tools
  • Applications of the Accellera Portable Stimulus Standard
  • Configuration management of IP and abstraction levels
  • Interoperability of models and/or tools
  • High-level synthesis from ESL languages
  • Bridging virtual prototyping, simulation, emulation and/or FPGA prototyping
MACHINE LEARNING AND BIG DATA
  • Automating the Optimization of Verification Processes
  • Coverage metrics and data analysis
  • Performance modeling and/or analysis
MIXED-SIGNAL DESIGN & VERIFICATION
  • Mixed-signal design & verification techniques
  • Real-value modeling approaches
  • Application of mixed-signal extensions for UVM
LOW-POWER DESIGN & VERIFICATION
  • Low-power design and verification
  • Clock domain crossing verification
  • Power modeling, estimation and management

Special Thanks

Conference Sponsors

Global Sponsors

Contact Us